18 search results - page 3 / 4 » Probabilistic maximum error modeling for unreliable logic ci... |
VLSID
2005
IEEE
14 years 5 months ago
2005
IEEE
We propose a novel, non-simulative, probabilistic model for switching activity in sequential circuits, capturing both spatio-temporal correlations at internal nodes and higher ord...
DAC
1998
ACM
14 years 6 months ago
1998
ACM
In this paper we present a statistical method for estimating the maximum power consumption in VLSI circuits. The method is based on the theory of extreme order statistics applied ...
JMLR
2010
13 years 2 days ago
2010
Logic-based probabilistic models (LBPMs) enable us to handle problems with uncertainty succinctly thanks to the expressive power of logic. However, most of LBPMs have restrictions...
VLSID
2006
IEEE
14 years 5 months ago
2006
IEEE
With device size shrinking and fast rising frequency ranges, effect of cosmic radiations and alpha particles known as Single-Event-Upset (SEU), Single-Eventtransients (SET), is a ...
ASPDAC
2007
ACM
13 years 9 months ago
2007
ACM
An accurate model is presented to calculate the short circuit energy dissipation of logic cells. The short circuit current is highly dependent on the input and output voltage valu...