18 search results - page 4 / 4 » Probabilistic maximum error modeling for unreliable logic ci... |
ASPDAC
2004
ACM
13 years 10 months ago
2004
ACM
— Reducing the ever-growing leakage power is critical to power efficient designs. Leakage reduction techniques such as power-gating using sleep transistor insertion introduces la...
ASPDAC
2010
ACM
13 years 2 months ago
2010
ACM
- Dynamic power consumption in CMOS circuits is usually estimated based on the number of signal transitions. However, when considering glitches, this is not accurate because narrow...
MVA
1996
13 years 6 months ago
1996
Segmentation of range images using superquadric entities has been pointed out by a number of researchers as a powerful approach towards object recognition. Problems exist in findi...