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CODES
2011
IEEE
12 years 5 months ago
Dynamic, multi-core cache coherence architecture for power-sensitive mobile processors
Today, mobile smartphones are expected to be able to run the same complex, memory-intensive applications that were originally designed and coded for general-purpose processors. Ho...
Garo Bournoutian, Alex Orailoglu
ASPDAC
2007
ACM
95views Hardware» more  ASPDAC 2007»
13 years 9 months ago
Low Power Techniques for Mobile Application SoCs Based on Integrated Platform "UniPhier"
In this Paper, we describe the various low power techniques for mobile application SoCs based on the integrated platform "UniPhier". To minimize SoC power dissipation, h...
Masaitsu Nakajima, Takao Yamamoto, Masayuki Yamasa...
ISCA
2012
IEEE
262views Hardware» more  ISCA 2012»
11 years 7 months ago
Boosting mobile GPU performance with a decoupled access/execute fragment processor
Smartphones represent one of the fastest growing markets, providing significant hardware/software improvements every few months. However, supporting these capabilities reduces the...
Jose-Maria Arnau, Joan-Manuel Parcerisa, Polychron...
CODES
2010
IEEE
13 years 3 months ago
Dynamic, non-linear cache architecture for power-sensitive mobile processors
Today, mobile smartphones are expected to be able to run the same complex, algorithm-heavy, memory-intensive applications that were originally designed and coded for generalpurpos...
Garo Bournoutian, Alex Orailoglu
ARCS
2006
Springer
13 years 9 months ago
A Single Issue DSP based Multi-standard Media Processor for Mobile Platforms
: This paper presents the study of modifying a legacy single-issue DSP processor to provide real-time processing capacity for emerging multimedia applications. The latest video com...
Di Wu, Tiejun Hu, Dake Liu