49 search results - page 2 / 10 » Programmable Asynchronous Pipeline Arrays |
DSD
2006
IEEE
13 years 11 months ago
2006
IEEE
Programmable logic arrays (PLAs) present an alternative to logic-gate based design. We propose the transistor level structure of a PLA for single-rail asynchronous applications. T...
ISCAS
2008
IEEE
13 years 11 months ago
2008
IEEE
— In this paper we present implementation and experimental results for a digital vision chip that operates in mixed asynchronous/synchronous mode. Mixed configuration benefits fr...
IJCNN
2000
IEEE
13 years 9 months ago
2000
IEEE
We have fabricated a PCA (Principal Component Analysis) learning network in a FPGA (Field Programmable Gate Array) by using an asynchronous PDM (Pulse Density Modulation) digital ...
FCCM
2008
IEEE
13 years 11 months ago
2008
IEEE
Internet Protocol (IP) lookup in routers can be implemented by some form of tree traversal. Pipelining can dramatically improve the search throughput. However, it results in unbal...
ISCAPDCS
2004
13 years 6 months ago
2004
FG is a programming environment for asynchronous programs that run on clusters and fit into a pipeline framework. It enables the programmer to write a series of synchronous functi...