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ICC
2007
IEEE
145views Communications» more  ICC 2007»
13 years 11 months ago
Lowering Error Floor of LDPC Codes Using a Joint Row-Column Decoding Algorithm
Low-density parity-check codes using the beliefpropagation decoding algorithm tend to exhibit a high error floor in the bit error rate curves, when some problematic graphical stru...
Zhiyong He, Sébastien Roy 0002, Paul Fortie...
SIPS
2006
IEEE
13 years 11 months ago
Partly Parallel Overlapped Sum-Product Decoder Architectures for Quasi-Cyclic LDPC Codes
Abstract— In this paper, we propose partly parallel architectures based on optimal overlapped sum-product (OSP) decoding. To ensure high throughput and hardware utilization effi...
Ning Chen, Yongmei Dai, Zhiyuan Yan
SIPS
2008
IEEE
13 years 11 months ago
Unified decoder architecture for LDPC/turbo codes
Low-density parity-check (LDPC) codes on par with convolutional turbo codes (CTC) are two of the most powerful error correction codes known to perform very close to the Shannon li...
Yang Sun, Joseph R. Cavallaro
CORR
2007
Springer
124views Education» more  CORR 2007»
13 years 5 months ago
Graph-Based Decoding in the Presence of ISI
We propose a new graph representation for ISI channels that can be used for combined equalization and decoding by linear programming (LP) or iterative message-passing (IMP) decodi...
Mohammad H. Taghavi, Paul H. Siegel
VTC
2007
IEEE
129views Communications» more  VTC 2007»
13 years 11 months ago
Iterative EM Based LDPC CDMA Receiver under Time Varying Interference
1 — The authors of this paper proposed an iterative expectation-maximization (EM) channel estimation based on a low-density parity-check (LDPC) code-division multiple access rece...
Don J. Torrieri, Avinash Mathur, Amitav Mukherjee,...