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PPOPP
2009
ACM
14 years 25 days ago
NePalTM: design and implementation of nested parallelism for transactional memory systems
Abstract. Transactional memory (TM) promises to simplify construction of parallel applications by allowing programmers to reason about interactions between concurrently executing c...
Haris Volos, Adam Welc, Ali-Reza Adl-Tabatabai, Ta...
INFOCOM
2012
IEEE
11 years 8 months ago
Block permutations in Boolean Space to minimize TCAM for packet classification
Packet classification is one of the major challenges in designing high-speed routers and firewalls as it involves sophisticated multi-dimensional searching. Ternary Content Address...
Rihua Wei, Yang Xu, H. Jonathan Chao
SPDP
1993
IEEE
13 years 10 months ago
Architectural Support for Block Transfers in a Shared-Memory Multiprocessor
This paper examines how the performance of a shared-memory multiprocessor can be improved by including hardware support for block transfers. A system similar to the Hector multipr...
Steven J. E. Wilton, Zvonko G. Vranesic
ASPDAC
2000
ACM
96views Hardware» more  ASPDAC 2000»
13 years 9 months ago
A programmable built-in self-test core for embedded memories
Testing embedded memories is becoming an industry-wide concern with the advent of deep-submicron technology and system-on-chip applications. We present a prototype chip for a progr...
Chih-Tsun Huang, Jing-Reng Huang, Cheng-Wen Wu
INFOCOM
2005
IEEE
13 years 11 months ago
IPStash: a set-associative memory approach for efficient IP-lookup
—IP-Lookup is a challenging problem because of the increasing routing table sizes, increased traffic, and higher speed links. These characteristics lead to the prevalence of hard...
Stefanos Kaxiras, Georgios Keramidas