52 search results - page 1 / 11 » Quantifying Locality In The Memory Access Patterns of HPC Ap... |
SC
2005
ACM
13 years 10 months ago
2005
ACM
IPPS
2003
IEEE
13 years 10 months ago
2003
IEEE
The application of hardware-parameterized models to distributed systems can result in omission of key bottlenecks such as the full cost of inter-node communication in a shared mem...
PVM
2010
Springer
13 years 3 months ago
2010
Springer
A major trend in HPC is the escalation toward manycore, where systems are composed of shared memory nodes featuring numerous processing units. Unfortunately, with scale comes compl...
PDP
2010
IEEE
13 years 9 months ago
2010
IEEE
The increasing numbers of cores, shared caches and memory nodes within machines introduces a complex hardware topology. High-performance computing applications now have to carefull...
HPCA
2002
IEEE
14 years 5 months ago
2002
IEEE
The increasing performance gap between processors and memory will force future architectures to devote significant resources towards removing and hiding memory latency. The two ma...