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» Quantitative Synthesis for Concurrent Programs
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FPGA
1992
ACM
176views FPGA» more  FPGA 1992»
13 years 10 months ago
Minimization of Permuted Reed-Muller Trees for Cellular Logic
The new family of Field Programmable Gate Arrays, CLI6000 from Concurrent Logic Inc realizes the truly Cellular Logic. It has been mainly designed for the realization of data path...
Li-Fei Wu, Marek A. Perkowski
FCCM
2007
IEEE
108views VLSI» more  FCCM 2007»
14 years 9 days ago
Configurable Transactional Memory
Programming efficiency of heterogeneous concurrent systems is limited by the use of lock-based synchronization mechanisms. Transactional memories can greatly improve the programmi...
Christoforos Kachris, Chidamber Kulkarni
MEMOCODE
2007
IEEE
14 years 7 days ago
Scheduling as Rule Composition
Bluespec is a high-level hardware description language used for architectural exploration, hardware modeling and synthesis of semiconductor chips. In Bluespec, one views hardware ...
Nirav Dave, Arvind, Michael Pellauer
SASP
2009
IEEE
291views Hardware» more  SASP 2009»
14 years 21 days ago
FCUDA: Enabling efficient compilation of CUDA kernels onto FPGAs
— As growing power dissipation and thermal effects disrupted the rising clock frequency trend and threatened to annul Moore’s law, the computing industry has switched its route...
Alexandros Papakonstantinou, Karthik Gururaj, John...
FMSD
2006
83views more  FMSD 2006»
13 years 6 months ago
A Framework for Modeling the Distributed Deployment of Synchronous Designs
Synchronous specifications are appealing in the design of large scale hardware and software systems because of their properties that facilitate verification and synthesis. When the...
Luca P. Carloni, Alberto L. Sangiovanni-Vincentell...