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PDPTA
2003
13 years 6 months ago
Quaternary Arithmetic Logic Unit on a Programmable Logic Device
Common binary arithmetic operations such as addition/subtraction and multiplication suffer from O(n) carry propagation delay where n is the number of digits. Carry lookahead helps...
Songpol Ongwattanakul, Phaisit Chewputtanagul, Dav...
ERSA
2006
105views Hardware» more  ERSA 2006»
13 years 6 months ago
A Column Arrangement Algorithm for a Coarse-grained Reconfigurable Architecture
In a coarse-grained reconfigurable architecture, the functions of resources such as Arithmetic Logic Units (ALUs) can be reconfigured. Unlike the programmability of a general purp...
Yuanqing Guo, Cornelis Hoede, Gerard J. M. Smit
EH
2004
IEEE
131views Hardware» more  EH 2004»
13 years 9 months ago
Swarm Intelligence for Digital Circuits Implementation on Field Programmable Gate Arrays Platforms
Field programmable gate arrays (FPGAs) are becoming increasingly important implementation platforms for digital circuits. One of the necessary requirements to effectively utilize ...
Ganesh K. Venayagamoorthy, Venu G. Gudise
PVM
2004
Springer
13 years 10 months ago
Numerical Simulations on PC Graphics Hardware
On recent PC graphics cards, fully programmable parallel geometry and pixel units are available providing powerful instruction sets to perform arithmetic and logical operations. In...
Jens Krüger, Thomas Schiwietz, Peter Kipfer, ...
TC
2010
13 years 10 hour ago
Performance Comparison of Graphics Processors to Reconfigurable Logic: A Case Study
A systematic approach to the comparison of the graphics processor (GPU) and reconfigurable logic is defined in terms of three throughput drivers. The approach is applied to five ca...
Ben Cope, Peter Y. K. Cheung, Wayne Luk, Lee W. Ho...