2 search results - page 1 / 1 » RT-level vector selection for realistic peak power simulatio... |
GLVLSI
2007
IEEE
13 years 6 months ago
2007
IEEE
We present a vector selection methodology for estimating the peak power dissipation in a CMOS logic circuit. The ultimate goal is to combine the speed of RT-level simulation with ...
ICCAD
1997
IEEE
13 years 8 months ago
1997
IEEE
A power estimation approach is presented in which blocks of consecutive vectors are selected at random from a user-supplied realistic input vector set and the circuit is simulated...