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» RTL Emulation: The Next Leap in System Verification
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DAC
1996
ACM
13 years 9 months ago
RTL Emulation: The Next Leap in System Verification
ion. Production use of text-based methodology has enabled designers to capture designs of hundreds of thousands of gates using graphic ESDA tools. Source: Data Quest (Verilog/VHDL ...
Sanjay Sawant, Paul Giordano
CODES
2007
IEEE
13 years 11 months ago
ESL design and HW/SW co-verification of high-end software defined radio platforms
Multiple wireless technologies are converging to run on personal handhelds. The plethora of communication standards next to the cost issues of deeper submicron processing require ...
A. C. H. Ng, J. W. Weijers, Miguel Glassee, Thomas...