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ISCA
2010
IEEE
214views Hardware» more  ISCA 2010»
13 years 9 months ago
Re-architecting DRAM memory systems with monolithically integrated silicon photonics
The performance of future manycore processors will only scale with the number of integrated cores if there is a corresponding increase in memory bandwidth. Projected scaling of el...
Scott Beamer, Chen Sun, Yong-Jin Kwon, Ajay Joshi,...
HOTI
2008
IEEE
13 years 11 months ago
Building Manycore Processor-to-DRAM Networks with Monolithic Silicon Photonics
We present a new monolithic silicon photonics technology suited for integration with standard bulk CMOS processes, which reduces costs and improves opto-electrical coupling compar...
Christopher Batten, Ajay Joshi, Jason Orcutt, Anat...