102 search results - page 2 / 21 » Read-After-Read Memory Dependence Prediction |
IEEEPACT
2002
IEEE
13 years 10 months ago
2002
IEEE
Memory dependence prediction allows out-of-order issue processors to achieve high degrees of instruction level parallelism by issuing load instructions at the earliest time withou...
IPPS
2008
IEEE
13 years 11 months ago
2008
IEEE
Transactional memory systems promise to reduce the burden of exposing thread-level parallelism in programs by relieving programmers from analyzing complex inter-thread dependences...
TOCS
1998
13 years 4 months ago
1998
This paper presents an experimental and analytical study of value prediction and its impact on speculative execution in superscalar microprocessors. Value prediction is a new para...
ICML
2010
IEEE
13 years 6 months ago
2010
IEEE
We propose a novel dependent hierarchical Pitman-Yor process model for discrete data. An incremental Monte Carlo inference procedure for this model is developed. We show that infe...
ISCA
1998
IEEE
13 years 9 months ago
1998
IEEE
For maximum performance, an out-of-order processor must issue load instructions as early as possible, while avoiding memory-order violations with prior store instructions that wri...