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» Rebound: scalable checkpointing for coherent shared memory
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HPCA
2007
IEEE
13 years 11 months ago
Error Detection via Online Checking of Cache Coherence with Token Coherence Signatures
To provide high dependability in a multithreaded system despite hardware faults, the system must detect and correct errors in its shared memory system. Recent research has explore...
Albert Meixner, Daniel J. Sorin
SRDS
1999
IEEE
13 years 9 months ago
Logging and Recovery in Adaptive Software Distributed Shared Memory Systems
Software distributed shared memory (DSM) improves the programmability of message-passing machines and workclusters by providing a shared memory abstract (i.e., a coherent global a...
Angkul Kongmunvattana, Nian-Feng Tzeng
MICRO
2010
IEEE
215views Hardware» more  MICRO 2010»
13 years 3 months ago
A Task-Centric Memory Model for Scalable Accelerator Architectures
This paper presents a task-centric memory model for 1000-core compute accelerators. Visual computing applications are emerging as an important class of workloads that can exploit ...
John H. Kelm, Daniel R. Johnson, Steven S. Lumetta...
SC
1992
ACM
13 years 9 months ago
Willow: A Scalable Shared Memory Multiprocessor
We are currently developing Willow, a shared-memory multiprocessor whose design provides system capacity and performance capable of supporting over a thousand commercial microproc...
John K. Bennett, Sandhya Dwarkadas, Jay A. Greenwo...
IPPS
1992
IEEE
13 years 9 months ago
CCHIME: A Cache Coherent Hybrid Interconnected Memory Extension
This paper presents a hybrid shared memory architecture which combines the scalability of a multistage interconnection network with the contention reduction benefits of coherent c...
Matthew K. Farrens, Arvin Park, Allison Woodruff