46 search results - page 8 / 10 » Rebound: scalable checkpointing for coherent shared memory |
ISCA
1998
IEEE
13 years 9 months ago
1998
IEEE
Alewife is a multiprocessor architecture that supports up to 512 processing nodes connected over a scalable and cost-effective mesh network at a constant cost per node. The MIT Al...
JAVA
2001
Springer
13 years 10 months ago
2001
Springer
Rapid commoditization of advanced hardware and progress of networking technology is now making wide area high-performance computing a.k.a. the ‘Grid’ Computing a reality. Sinc...
HPCA
1997
IEEE
13 years 9 months ago
1997
IEEE
Many parallel systems offer a simple view of memory: all storage cells are addresseduniformly. Despite a uniform view of the memory, the machines differsignificantly in theirmemo...
HPCA
1999
IEEE
13 years 9 months ago
1999
IEEE
Researchers have searched for scalable alternatives to the symmetric multiprocessor (SMP) architecture since it was first introduced in 1982. This paper introduces an alternative ...
IEEEPACT
2008
IEEE
13 years 12 months ago
2008
IEEE
This paper presents the Distributed Cooperative Caching, a scalable and energy-efficient scheme to manage chip multiprocessor (CMP) cache resources. The proposed configuration is...