68 search results - page 3 / 14 » Reconfigurable Processing Units vs. Reconfigurable Interconn... |
AHS
2006
IEEE
13 years 11 months ago
2006
IEEE
Domain-specific reconfigurable arrays have shown to provide an efficient trade-off between flexibility of FPGA and performance of ASIC circuit. Nonetheless, the design of these he...
MJ
2006
13 years 5 months ago
2006
In this paper, we propose a method for speeding-up Digital Signal Processing applications by partitioning them between the reconfigurable hardware blocks of different granularity ...
ASAP
1996
IEEE
13 years 9 months ago
1996
IEEE
A datapath synthesis system (DPSS) for a bus-based wavefront array architecture, called rDPA (reconfigurable datapath architecture), is presented. An internal data bus to the arra...
CCGRID
2001
IEEE
13 years 8 months ago
2001
IEEE
This paper describes the principles of an original adaptive interconnect for a computational cluster. Torus topology (2d or 3d) is used as a basis but nodes are allowed to effecti...
DATE
2007
IEEE
13 years 11 months ago
2007
IEEE
Individual Data Processing Units (DPUs) are commonly used for operational control and specific data processing of scientific space instruments. To overcome the limitations of trad...