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» Reducing BDD Size by Exploiting Structural Connectivity
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GLVLSI
2007
IEEE
141views VLSI» more  GLVLSI 2007»
14 years 9 days ago
Transition-activity aware design of reduction-stages for parallel multipliers
We propose an interconnect reorganization algorithm for reduction stages in parallel multipliers. It aims at minimizing power consumption for given static probabilities at the pri...
Saeeid Tahmasbi Oskuii, Per Gunnar Kjeldsberg, Osc...
NDSS
2005
IEEE
13 years 11 months ago
The Internet Motion Sensor - A Distributed Blackhole Monitoring System
As national infrastructure becomes intertwined with emerging global data networks, the stability and integrity of the two have become synonymous. This connection, while necessary,...
Michael Bailey, Evan Cooke, Farnam Jahanian, Jose ...
ICCD
2006
IEEE
97views Hardware» more  ICCD 2006»
14 years 2 months ago
Pesticide: Using SMT Processors to Improve Performance of Pointer Bug Detection
Pointer bugs associated with dynamically-allocated objects resulting in out-of-bounds memory access are an important class of software bugs. Because such bugs cannot be detected e...
Jin-Yi Wang, Yen-Shiang Shue, T. N. Vijaykumar, Sa...
BMCBI
2010
151views more  BMCBI 2010»
13 years 6 months ago
Using diffusion distances for flexible molecular shape comparison
Background: Many molecules are flexible and undergo significant shape deformation as part of their function, and yet most existing molecular shape comparison (MSC) methods treat t...
Yu-Shen Liu, Qi Li, Guo-Qin Zheng, Karthik Ramani,...
DAC
2003
ACM
14 years 7 months ago
The synthesis of cyclic combinational circuits
Combinational circuits are generally thought of as acyclic structures. It is known that cyclic structures can be combinational, and techniques have been proposed to analyze cyclic...
Marc D. Riedel, Jehoshua Bruck