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» Reducing Branch Costs via Branch Alignment
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PLDI
1998
ACM
13 years 9 months ago
Improving Performance by Branch Reordering
The conditional branch has long been considered an expensive operation. The relative cost of conditional branches has increased as recently designed machines are now relying on de...
Minghui Yang, Gang-Ryung Uh, David B. Whalley
IPPS
2008
IEEE
13 years 12 months ago
Low power/area branch prediction using complementary branch predictors
Although high branch prediction accuracy is necessary for high performance, it typically comes at the cost of larger predictor tables and/or more complex prediction algorithms. Un...
Resit Sendag, Joshua J. Yi, Peng-fei Chuang, David...
IPPS
2005
IEEE
13 years 11 months ago
Control-Flow Independence Reuse via Dynamic Vectorization
Current processors exploit out-of-order execution and branch prediction to improve instruction level parallelism. When a branch prediction is wrong, processors flush the pipeline ...
Alex Pajuelo, Antonio González, Mateo Valer...
SAC
2006
ACM
13 years 11 months ago
Branchless cycle prediction for embedded processors
Modern embedded processors access the Branch Target Buffer (BTB) every cycle to speculate branch target addresses. Such accesses, quite often, are unnecessary as there is no branc...
Kaveh Jokar Deris, Amirali Baniasadi
PLDI
2005
ACM
13 years 11 months ago
Code placement for improving dynamic branch prediction accuracy
Code placement techniques have traditionally improved instruction fetch bandwidth by increasing instruction locality and decreasing the number of taken branches. However, traditio...
Daniel A. Jiménez