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» Reducing Exit Stub Memory Consumption in Code Caches
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HIPEAC
2007
Springer
13 years 10 months ago
Reducing Exit Stub Memory Consumption in Code Caches
Abstract. The interest in translation-based virtual execution environments (VEEs) is growing with the recognition of their importance in a variety of applications. However, due to ...
Apala Guha, Kim M. Hazelwood, Mary Lou Soffa
CASES
2008
ACM
13 years 6 months ago
Efficient code caching to improve performance and energy consumption for java applications
Java applications rely on Just-In-Time (JIT) compilers or adaptive compilers to generate and optimize binary code at runtime to boost performance. In conventional Java Virtual Mac...
Yu Sun, Wei Zhang
CODES
2005
IEEE
13 years 6 months ago
An efficient direct mapped instruction cache for application-specific embedded systems
Caches may consume half of a microprocessor’s total power and cache misses incur accessing off-chip memory, which is both time consuming and energy costly. Therefore, minimizing...
Chuanjun Zhang
ISLPED
2005
ACM
103views Hardware» more  ISLPED 2005»
13 years 10 months ago
A non-uniform cache architecture for low power system design
This paper proposes a non-uniform cache architecture for reducing the power consumption of memory systems. The nonuniform cache allows having different associativity values (i.e.,...
Tohru Ishihara, Farzan Fallah
CODES
2011
IEEE
12 years 4 months ago
Dynamic, multi-core cache coherence architecture for power-sensitive mobile processors
Today, mobile smartphones are expected to be able to run the same complex, memory-intensive applications that were originally designed and coded for general-purpose processors. Ho...
Garo Bournoutian, Alex Orailoglu