Abstract. We apply Uppaal Tiga to automatically compute adaptive scheduling strategies for an industrial case study dealing with a state-of-the-art image processing pipeline of a p...
Israa AlAttili, Fred Houben, Georgeta Igna, Steffe...
Abstract--Functional verification is one of the major bottlenecks in system-on-chip design due to the combined effects of increasing complexity and lack of automated techniques for...
In test generation based on model-checking, white-box test criteria are represented as trap conditions written in a temporal logic. A model checker is used to refute trap conditio...
In the area of privacy-preserving data mining, a differentially private mechanism intuitively encourages people to share their data truthfully because they are at little risk of ...