15 search results - page 3 / 3 » Reducing Leakage through Filter Cache |
IPPS
2007
IEEE
13 years 11 months ago
2007
IEEE
As process technology advances toward deep submicron (below 90nm), static power becomes a new challenge to address for energy-efficient high performance processors, especially for...
ICS
2009
Tsinghua U.
13 years 11 months ago
2009
Tsinghua U.
The L2 cache is commonly managed using LRU policy. For workloads that have a working set larger than L2 cache, LRU behaves poorly, resulting in a great number of less reused lines...
TC
2008
13 years 4 months ago
2008
Recent studies have shown that, in highly associative caches, the performance gap between the Least Recently Used (LRU) and the theoretical optimal replacement algorithms is large,...
ICCAD
2009
IEEE
13 years 2 months ago
2009
IEEE
The emerging Spin Torque Transfer memory (STT-RAM) is a promising candidate for future on-chip caches due to STT-RAM's high density, low leakage, long endurance and high acce...
HPCA
2009
IEEE
14 years 5 months ago
2009
IEEE
Magnetic Random Access Memory (MRAM) is considered to be a promising future memory technology due to its low leakage power, high density and fast read speed. The heterogeneous int...