12 search results - page 1 / 3 » Reducing Operand Transport Complexity of Superscalar Process... |
ICCD
2003
IEEE
14 years 1 months ago
2003
IEEE
A critical problem in wide-issue superscalar processors is the limit on cycle time imposed by the central register file and operand bypass network. In this paper, a distributed re...
HPCA
2005
IEEE
14 years 5 months ago
2005
IEEE
A large multi-ported register file is indispensable for exploiting instruction level parallelism (ILP) in today's dynamically scheduled superscalar processors. The number of ...
ICS
2003
Tsinghua U.
13 years 10 months ago
2003
Tsinghua U.
In high-performance wide-issue microprocessors the access time, energy and area of the register file are often critical to overall performance. This is because these pararmeters g...
IEEEPACT
2003
IEEE
13 years 10 months ago
2003
IEEE
We present a technique for reducing the power dissipation in the course of writebacks and committments in a datapath that uses a dedicated architectural register file (ARF) to hol...
ISLPED
2003
ACM
13 years 10 months ago
2003
ACM
Modern superscalar processors implement precise interrupts by using the Reorder Buffer (ROB). In some microarchitectures , such as the Intel P6, the ROB also serves as a repositor...