287 search results - page 2 / 58 » Reducing Power in High-Performance Microprocessors |
TVLSI
2010
12 years 11 months ago
2010
Microprocessor designers have been torn between tight constraints on the amount of on-chip cache memory and the high latency of off-chip memory, such as dynamic random access memor...
VLSID
2002
IEEE
13 years 9 months ago
2002
IEEE
Power consumption is becoming an increasingly important constraint in the design of microprocessors. This paper examines the use of multiple constrained processors running at lowe...
COMPCON
1995
IEEE
13 years 8 months ago
1995
IEEE
EWSN
2012
Springer
12 years 15 days ago
2012
Springer
Abstract. Some have argued that the dichotomy between high-performance operation and low resource utilization is false – an artifact that will soon succumb to Moore’s Law and c...
TVLSI
2010
12 years 11 months ago
2010
Dynamic gates have been excellent choice in the design of high-performance modules in modern microprocessors. The only limitation of dynamic gates is their relatively low noise mar...