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» Reducing Register Pressure Through LAER Algorithm
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ASPLOS
2008
ACM
13 years 7 months ago
SoftSig: software-exposed hardware signatures for code analysis and optimization
Many code analysis techniques for optimization, debugging, or parallelization need to perform runtime disambiguation of sets of addresses. Such operations can be supported efficie...
James Tuck, Wonsun Ahn, Luis Ceze, Josep Torrellas
MICCAI
2010
Springer
13 years 3 months ago
Intra-Patient Supine-Prone Colon Registration in CT Colonography Using Shape Spectrum
CT colonography (CTC) is a minimally invasive screening technique for colorectal polyps and colon cancer. Since electronic colon cleansing (ECC) cannot completely remove the presen...
Zhaoqiang Lai, Jiaxi Hu, Chang Liu, Vahid Taimouri...
MSO
2003
13 years 6 months ago
Simulation based Development of Efficient Hardware for Sort based Algorithms
The use of sub-optimal digital systems can at times lead to high speed, efficient, costeffective structures that are sufficient to perform needed tasks. We describe here a system ...
Niklas Hansson, Jay H. Harris
TSMC
2010
13 years 6 days ago
Toward Unconstrained Ear Recognition From Two-Dimensional Images
Abstract--Ear recognition, as a biometric, has several advantages. In particular, ears can be measured remotely and are also relatively static in size and structure for each indivi...
John D. Bustard, Mark S. Nixon
CASES
2006
ACM
13 years 9 months ago
Reaching fast code faster: using modeling for efficient software thread integration on a VLIW DSP
When integrating software threads together to boost performance on a processor with instruction-level parallel processing support, it is rarely clear which code regions should be ...
Won So, Alexander G. Dean