42 search results - page 2 / 9 » Reducing cache misses using hardware and software page place... |
IEEEPACT
2009
IEEE
2009
IEEE
Soft-OLP: Improving Hardware Cache Performance through Software-Controlled Object-Level Partitioning
13 years 11 months ago
—Performance degradation of memory-intensive programs caused by the LRU policy’s inability to handle weaklocality data accesses in the last level cache is increasingly serious ...
ASPLOS
2008
ACM
13 years 7 months ago
2008
ACM
Nested paging is a hardware solution for alleviating the software memory management overhead imposed by system virtualization. Nested paging complements existing page walk hardwar...
IEEEPACT
2006
IEEE
13 years 11 months ago
2006
IEEE
On machines with high-performance processors, the memory system continues to be a performance bottleneck. Compilers insert prefetch operations and reorder data accesses to improve...
MICRO
1995
IEEE
13 years 8 months ago
1995
IEEE
Software prefetching, typically in the context of numericor loop-intensive benchmarks, has been proposed as one remedy for the performance bottleneck imposed on computer systems b...
VALUETOOLS
2006
ACM
13 years 11 months ago
2006
ACM
Cache locality optimization is an efficient way for reducing the idle time of modern processors in waiting for needed data. This kind of optimization can be achieved either on the...