Sciweavers

42 search results - page 8 / 9
» Reducing cache misses using hardware and software page place...
Sort
View
ISCA
2005
IEEE
141views Hardware» more  ISCA 2005»
13 years 11 months ago
RegionScout: Exploiting Coarse Grain Sharing in Snoop-Based Coherence
It has been shown that many requests miss in all remote nodes in shared memory multiprocessors. We are motivated by the observation that this behavior extends to much coarser grai...
Andreas Moshovos
SIGMETRICS
2008
ACM
214views Hardware» more  SIGMETRICS 2008»
13 years 5 months ago
HMTT: a platform independent full-system memory trace monitoring system
Memory trace analysis is an important technology for architecture research, system software (i.e., OS, compiler) optimization, and application performance improvements. Many appro...
Yungang Bao, Mingyu Chen, Yuan Ruan, Li Liu, Jianp...
JSA
2006
167views more  JSA 2006»
13 years 5 months ago
Pattern-driven prefetching for multimedia applications on embedded processors
Multimedia applications in general and video processing, such as the MPEG4 Visual stream decoders, in particular are increasingly popular and important workloads for future embedd...
Hassan Sbeyti, Smaïl Niar, Lieven Eeckhout
MICRO
2010
IEEE
156views Hardware» more  MICRO 2010»
13 years 3 months ago
Explicit Communication and Synchronization in SARC
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...
Manolis Katevenis, Vassilis Papaefstathiou, Stamat...
HIPEAC
2011
Springer
12 years 5 months ago
Decoupled zero-compressed memory
For each computer system generation, there are always applications or workloads for which the main memory size is the major limitation. On the other hand, in many cases, one could...
Julien Dusser, André Seznec