723 search results - page 1 / 145 » Reducing the complexity of the issue logic |
ICS
2001
Tsinghua U.
13 years 9 months ago
2001
Tsinghua U.
The issue logic of dynamically scheduled superscalar processors is one of their most complex and power-consuming parts. In this paper we present alternative issue-logic designs th...
ICS
2000
Tsinghua U.
13 years 8 months ago
2000
Tsinghua U.
One of the main concerns in today's processor design is the issue logic. Instruction-level parallelism is usually favored by an out-of-order issue mechanism where instruction...
CAINE
2003
13 years 6 months ago
2003
In order to enhance the computer performance, nowadays microprocessors use Superscalar architecture. But the Superscalar architecture is unable to enhance the performance effectiv...
AGP
1998
IEEE
13 years 9 months ago
1998
IEEE
Visualization of program executions has been found useful in applications which include education and debugging. However, traditional visualization techniques often fall short of ...
ICS
2005
Tsinghua U.
13 years 10 months ago
2005
Tsinghua U.
In an out-of-order issue processor, instructions are dynamically reordered and issued to function units in their dataready order rather than their original program order to achiev...