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ISLPED
1995
ACM
95views Hardware» more  ISLPED 1995»
13 years 8 months ago
Reducing the frequency of tag compares for low power I-cache design
In current processors, the cache controller, which contains the cache directory and other logic such as tag comparators, is active for each instruction fetch and is responsible fo...
Ramesh Panwar, David A. Rennels
ISLPED
1995
ACM
235views Hardware» more  ISLPED 1995»
13 years 8 months ago
Low power and EMI, high frequency, crystal oscillator
The high-frequency oscillator is one of the major causes of both high power consumption and high ElectroMagnetic Interference (EMI) in Embedded Systems (ES). This paper presents a...
Rafael Fried, Reuven Holzer
GLVLSI
2003
IEEE
166views VLSI» more  GLVLSI 2003»
13 years 10 months ago
Exponential split accumulator for high-speed reduced area low-power direct digital frequency synthesizers
A new split accumulator architecture to be used in direct digital frequency synthesizers (DDFS) systems is presented. This new design eliminates the need of adders on the section ...
Edward Merlo, Kwang-Hyun Baek, Myung-Jun Choe
ISLPED
2003
ACM
90views Hardware» more  ISLPED 2003»
13 years 10 months ago
Low cost instruction cache designs for tag comparison elimination
Tag comparison elimination (TCE) is an effective approach to reduce I-cache energy. Current research focuses on finding good tradeoffs between hardware cost and percentage of comp...
Youtao Zhang, Jun Yang 0002
ICCAD
2004
IEEE
113views Hardware» more  ICCAD 2004»
14 years 1 months ago
Vdd programmability to reduce FPGA interconnect power
Power is an increasingly important design constraint for FPGAs in nanometer technologies. Because interconnect power is dominant in FPGAs, we design Vdd-programmable interconnect ...
Fei Li, Yan Lin, Lei He