Sciweavers

151 search results - page 29 / 31
» Reinventing Scheduling for Multicore Systems
Sort
View
MICRO
2008
IEEE
149views Hardware» more  MICRO 2008»
14 years 4 days ago
Prefetch-Aware DRAM Controllers
Existing DRAM controllers employ rigid, non-adaptive scheduling and buffer management policies when servicing prefetch requests. Some controllers treat prefetch requests the same ...
Chang Joo Lee, Onur Mutlu, Veynu Narasiman, Yale N...
MICRO
2011
IEEE
193views Hardware» more  MICRO 2011»
12 years 9 months ago
Voltage Noise in Production Processors
Abstract—Parameter variations have become a dominant challenge in microprocessor design. Voltage variation is especially daunting because it happens so rapidly. We measure and ch...
Vijay Janapa Reddi, Svilen Kanev, Wonyoung Kim, Si...
EMSOFT
2010
Springer
13 years 3 months ago
From high-level component-based models to distributed implementations
Constructing correct distributed systems from their high-level models has always been a challenge and often subject to serious errors because of their non-deterministic and non-at...
Borzoo Bonakdarpour, Marius Bozga, Mohamad Jaber, ...
CASES
2009
ACM
14 years 8 days ago
Towards scalable reliability frameworks for error prone CMPs
As technology scales and the energy of computation continually approaches thermal equilibrium [1,2], parameter variations and noise levels will lead to larger error rates at vario...
Joseph Sloan, Rakesh Kumar
ISCA
2010
IEEE
199views Hardware» more  ISCA 2010»
13 years 10 months ago
A case for FAME: FPGA architecture model execution
Given the multicore microprocessor revolution, we argue that the architecture research community needs a dramatic increase in simulation capacity. We believe FPGA Architecture Mod...
Zhangxi Tan, Andrew Waterman, Henry Cook, Sarah Bi...