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FPGA
2007
ACM
150views FPGA» more  FPGA 2007»
13 years 12 months ago
FPGA-friendly code compression for horizontal microcoded custom IPs
Shrinking time-to-market and high demand for productivity has driven traditional hardware designers to use design methodologies that start from high-level languages. However, meet...
Bita Gorjiara, Daniel Gajski
GECCO
2004
Springer
145views Optimization» more  GECCO 2004»
13 years 11 months ago
Search Based Automatic Test-Data Generation at an Architectural Level
Abstract. The need for effective testing techniques for architectural level descriptions is widely recognised. However, due to the variety of domain-specific architectural descript...
Yuan Zhan, John A. Clark
LCTRTS
2005
Springer
13 years 11 months ago
Complementing software pipelining with software thread integration
Software pipelining is a critical optimization for producing efficient code for VLIW/EPIC and superscalar processors in highperformance embedded applications such as digital sign...
Won So, Alexander G. Dean
SIGMOD
2002
ACM
236views Database» more  SIGMOD 2002»
14 years 5 months ago
The Cougar Approach to In-Network Query Processing in Sensor Networks
The widespread distribution and availability of smallscale sensors, actuators, and embedded processors is transforming the physical world into a computing platform. One such examp...
Yong Yao, Johannes Gehrke
LCTRTS
2010
Springer
14 years 17 days ago
Operation and data mapping for CGRAs with multi-bank memory
Coarse Grain Reconfigurable Architectures (CGRAs) promise high performance at high power efficiency. They fulfil this promise by keeping the hardware extremely simple, and movi...
Yongjoo Kim, Jongeun Lee, Aviral Shrivastava, Yunh...