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» Reliability-aware design for nanometer-scale devices
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DT
2006
109views more  DT 2006»
13 years 4 months ago
Test Consideration for Nanometer-Scale CMOS Circuits
The ITRS (International Technology Roadmap for Semiconductors) predicts aggressive scaling down of device size, transistor threshold voltage and oxide thickness to meet growing de...
Kaushik Roy, T. M. Mak, Kwang-Ting (Tim) Cheng
ISMVL
2008
IEEE
134views Hardware» more  ISMVL 2008»
13 years 11 months ago
Multiple-Valued Logic Memory System Design Using Nanoscale Electrochemical Cells
Nanoscale multiple-valued logic systems require the development of nanometer scale integrated circuits and components. Due to limits in device physics, new components must be deve...
Theodore W. Manikas, Dale Teeters
ISQED
2006
IEEE
259views Hardware» more  ISQED 2006»
13 years 10 months ago
Impact of NBTI on SRAM Read Stability and Design for Reliability
— Negative Bias Temperature Instability (NBTI) has the potential to become one of the main show-stoppers of circuit reliability in nanometer scale devices due to its deleterious ...
Sanjay V. Kumar, Chris H. Kim, Sachin S. Sapatneka...
DATE
2002
IEEE
96views Hardware» more  DATE 2002»
13 years 9 months ago
A Linear-Centric Simulation Framework for Parametric Fluctuations
The relative tolerances for interconnect and device parameter variations have not scaled with feature sizes which have brought about significant performance variability. As we sca...
Emrah Acar, Sani R. Nassif, Lawrence T. Pileggi
ASPDAC
2007
ACM
121views Hardware» more  ASPDAC 2007»
13 years 8 months ago
Ultralow-Power Reconfigurable Computing with Complementary Nano-Electromechanical Carbon Nanotube Switches
In recent years, several alternative devices have been proposed to deal with inherent limitation of conventional CMOS devices in terms of scalability at nanometer scale geometry. ...
Swarup Bhunia, Massood Tabib-Azar, Daniel G. Saab