49 search results - page 1 / 10 » Remove the memory wall: from performance modeling to archite... |
IPPS
2006
IEEE
13 years 11 months ago
2006
IEEE
DAC
2006
ACM
13 years 11 months ago
2006
ACM
Reduction of the on-chip memory size is a key issue in video codec system design. Because video codec applications involve complex algorithms that are both data-intensive and cont...
NPC
2005
Springer
13 years 10 months ago
2005
Springer
This paper focuses on the Cyclops64 computer architecture and presents an analytical model and performance simulation results for the preloading and loop unrolling approaches to op...
PPOPP
2009
ACM
14 years 5 months ago
2009
ACM
Due to power wall, memory wall, and ILP wall, we are facing the end of ever increasing single-threaded performance. For this reason, multicore and manycore processors are arising ...
ECCV
2008
Springer
14 years 6 months ago
2008
Springer
Abstract. As part of an architectural modeling project, this paper investigates the problem of understanding and manipulating images of buildings. Our primary motivation is to auto...