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ASPDAC
2004
ACM
107views Hardware» more  ASPDAC 2004»
13 years 10 months ago
Fast, predictable and low energy memory references through architecture-aware compilation
The design of future high-performance embedded systems is hampered by two problems: First, the required hardware needs more energy than is available from batteries. Second, curren...
Peter Marwedel, Lars Wehmeyer, Manish Verma, Stefa...
ICCAD
1999
IEEE
84views Hardware» more  ICCAD 1999»
13 years 9 months ago
Power minimization using system-level partitioning of applications with quality of service requirements
Design systems to provide various quality of service (QoS) guarantees has received a lot of attentions due to the increasing popularity of real-time multimedia and wireless commun...
Gang Qu, Miodrag Potkonjak
RTSS
2005
IEEE
13 years 11 months ago
Decentralized Utilization Control in Distributed Real-Time Systems
Many real-time systems must control their CPU utilizations in order to meet end-to-end deadlines and prevent overload. Utilization control is particularly challenging in distribut...
Xiaorui Wang, Dong Jia, Chenyang Lu, Xenofon D. Ko...
ISQED
2007
IEEE
128views Hardware» more  ISQED 2007»
13 years 11 months ago
A Model for Timing Errors in Processors with Parameter Variation
Parameter variation in integrated circuits causes sections of a chip to be slower than others. To prevent any resulting timing errors, designers have traditionally designed for th...
Smruti R. Sarangi, Brian Greskamp, Josep Torrellas
IEEEPACT
2000
IEEE
13 years 9 months ago
On Some Implementation Issues for Value Prediction on Wide-Issue ILP Processors
In this paper, we look at two issues which could affect the performance of value prediction on wide-issue ILP processors. One is the large number of accesses to the value predicti...
Sang Jeong Lee, Pen-Chung Yew