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ICLP
2007
Springer
13 years 9 months ago
User-Definable Resource Bounds Analysis for Logic Programs
We present a static analysis that infers both upper and lower bounds on the usage that a logic program makes of a set of user-definable resources. The inferred bounds will in gener...
Jorge Navas, Edison Mera, Pedro López-Garc&...
ATVA
2009
Springer
97views Hardware» more  ATVA 2009»
13 years 6 months ago
Memory Usage Verification Using Hip/Sleek
Embedded systems often come with constrained memory footprints. It is therefore essential to ensure that software running on such platforms fulfils memory usage specifications at c...
Guanhua He, Shengchao Qin, Chenguang Luo, Wei-Ngan...
ICC
2007
IEEE
148views Communications» more  ICC 2007»
13 years 12 months ago
Improved Revenue and Radio Resource Usage through Inter-Operator Joint Radio Resource Management
— This paper proposes a two-layer Joint Radio Resource Management (JRRM) framework to improve the efficiency in multi-radio and multi-operator cellular scenarios. On the one hand...
Lorenza Giupponi, Ramón Agustí, Jord...
FOSAD
2009
Springer
14 years 3 days ago
Resource Usage Analysis and Its Application to Resource Certification
Elvira Albert, Puri Arenas, Samir Genaim, Germ&aac...
SIGSOFT
2007
ACM
14 years 6 months ago
Quantitative verification: models techniques and tools
Automated verification is a technique for establishing if certain properties, usually expressed in temporal logic, hold for a system model. The model can be defined using a high-l...
Marta Z. Kwiatkowska