Sciweavers

184 search results - page 36 / 37
» Resource mapping and scheduling for heterogeneous network pr...
Sort
View
ISLPED
2005
ACM
85views Hardware» more  ISLPED 2005»
13 years 10 months ago
A low-power crossroad switch architecture and its core placement for network-on-chip
As the number of cores on a chip increases, power consumed by the communication structures takes significant portion of the overall power-budget. The individual components of the...
Kuei-Chung Chang, Jih-Sheng Shen, Tien-Fu Chen
VLSID
2006
IEEE
192views VLSI» more  VLSID 2006»
13 years 11 months ago
Beyond RTL: Advanced Digital System Design
This tutorial focuses on advanced techniques to cope with the complexity of designing modern digital chips which are complete systems often containing multiple processors, complex...
Shiv Tasker, Rishiyur S. Nikhil
CORR
2010
Springer
198views Education» more  CORR 2010»
13 years 5 months ago
Space and the Synchronic A-Ram
Space is a spatial programming language designed to exploit the massive parallelism available in a formal model of computation called the Synchronic A-Ram, and physically related ...
Alexander Victor Berka
GRID
2005
Springer
13 years 10 months ago
Automatic clustering of grid nodes
— In a grid-computing environment, resource selection and scheduling depend on the network topology connecting the computation nodes. This paper presents a method to hierarchical...
Qiang Xu, Jaspal Subhlok
EMS
2009
IEEE
13 years 12 months ago
Simulation of a Smart Grid City with Software Agents
—In the future smart city, new information and communication technologies will enable a better management of the available resources. The future smart grid infrastructure is emer...
Stamatis Karnouskos, Thiago Nass de Holanda