22 search results - page 4 / 5 » Return Address Protection on Cache Memories |
MICRO
2005
IEEE
13 years 11 months ago
2005
IEEE
Various architectural power reduction techniques have been proposed for on-chip caches in the last decade. In this paper, we first show that these power reduction techniques can b...
MICRO
2000
IEEE
13 years 10 months ago
2000
IEEE
Silent store instructions write values that exactly match the values that are already stored at the memory address that is being written. A recent study reveals that significant ...
HOTOS
2003
IEEE
13 years 11 months ago
2003
IEEE
Cerium is a trusted computing architecture that protects a program’s execution from being tampered while the program is running. Cerium uses a physically tamperresistant CPU and...
WCRE
2005
IEEE
13 years 11 months ago
2005
IEEE
Buffer overflows have been the most common form of security vulnerability in the past decade. A number of techniques have been proposed to address such attacks. Some are limited t...
MICRO
2010
IEEE
13 years 4 months ago
2010
IEEE
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...