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LCTRTS
2004
Springer
13 years 11 months ago
Feedback driven instruction-set extension
Application specific instruction-set processors combine an efficient general purpose core with special purpose functionality that is tailored to a particular application domain. ...
Uwe Kastens, Dinh Khoi Le, Adrian Slowik, Michael ...
JEC
2006
61views more  JEC 2006»
13 years 5 months ago
Time-constrained loop scheduling with minimal resources
Many applications commonly found in digital signal processing and image processing applications can be represented by data-flow graphs (DFGs). In our previous work, we proposed a ...
Timothy W. O'Neil, Edwin Hsing-Mean Sha
CODES
2005
IEEE
13 years 11 months ago
Future wireless convergence platforms
As wireless platforms converge to multimedia systems, architectures must converge to support voice, data, and video applications. From a processor architecture perspective, suppor...
C. John Glossner, Mayan Moudgill, Daniel Iancu, Ga...
GLVLSI
2002
IEEE
109views VLSI» more  GLVLSI 2002»
13 years 10 months ago
Minimizing resources in a repeating schedule for a split-node data-flow graph
Many computation-intensive or recursive applications commonly found in digital signal processing and image processing applications can be represented by data-flow graphs (DFGs). ...
Timothy W. O'Neil, Edwin Hsing-Mean Sha
ICS
2007
Tsinghua U.
13 years 12 months ago
Sensitivity analysis for automatic parallelization on multi-cores
Sensitivity Analysis (SA) is a novel compiler technique that complements, and integrates with, static automatic parallelization analysis for the cases when relevant program behavi...
Silvius Rus, Maikel Pennings, Lawrence Rauchwerger