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DAC
1994
ACM
13 years 8 months ago
Routing in a New 2-Dimensional FPGA/FPIC Routing Architecture
- This paper studies the routing problem for a new Field-Programmable Gate Array (FPGA) and Field-Programmable Interconnect Chip (FPIC) routing architecture which improves upon the...
Yachyang Sun, C. L. Liu
FPGA
2005
ACM
90views FPGA» more  FPGA 2005»
13 years 10 months ago
Using bus-based connections to improve field-programmable gate array density for implementing datapath circuits
Abstract—As the logic capacity of field-programmable gate arrays (FPGAs) increases, they are increasingly being used to implement large arithmetic-intensive applications, which ...
Andy Gean Ye, Jonathan Rose
FPGA
2003
ACM
123views FPGA» more  FPGA 2003»
13 years 9 months ago
Wire type assignment for FPGA routing
The routing channels of an FPGA consist of wire segments of various types providing the tradeoff between performance and routability. In the routing architectures of recently dev...
Seokjin Lee, Hua Xiang, D. F. Wong, Richard Y. Sun
ICCAD
1994
IEEE
106views Hardware» more  ICCAD 1994»
13 years 8 months ago
On the NP-completeness of regular 2-D FPGA routing architectures and a novel solution
Several industrial FPGA routing architectures have been shown to have no efficient routing algorithms (unless P=NP) [3,4]. Here, we further investigate if the intractability of th...
Yu-Liang Wu, Douglas Chang
DAC
2006
ACM
14 years 5 months ago
A new hybrid FPGA with nanoscale clusters and CMOS routing
In this paper we propose a hybrid FPGA using nanoscale clusters with an architecture similar to clusters of traditional CMOS FPGAs. The proposed cluster is made of a crossbar of n...
Reza M. Rad, Mohammad Tehranipoor