19 search results - page 2 / 4 » SAT and ATPG: Boolean engines for formal hardware verificati... |
VLSID
2002
IEEE
14 years 5 months ago
2002
IEEE
Satisfiability of complex word-level formulas often arises as a problem in formal verification of hardware designs described at the register transfer level (RTL). Even though most...
FMCAD
2008
Springer
13 years 6 months ago
2008
Springer
The extensional theory of arrays is one of the most important ones for applications of SAT Modulo Theories (SMT) to hardware and software verification. Here we present a new T-solv...
ICCAD
2009
IEEE
13 years 3 months ago
2009
IEEE
Boolean satisfiability (SAT) based methods have traditionally been popular for formally verifying properties for digital circuits. We present a novel methodology for formulating a...
ICCAD
2007
IEEE
14 years 2 months ago
2007
IEEE
Functional dependency is concerned with rewriting a Boolean function f as a function h over a set of base functions {g1, …, gn}, i.e. f = h(g1, …, gn). It plays an important r...
DAC
2002
ACM
14 years 6 months ago
2002
ACM
We propose Satisfiability Checking (SAT) techniques that lead to a consistent performance improvement of up to 3x over state-ofthe-art SAT solvers like Chaff on important problem ...