In this paper we present the algorithm and architecture of a radix-10 floating-point divider based on an SRT nonrestoring digit-by-digit algorithm. The algorithm uses conventional...
Abstract-- It is impractical to verify multiplier or divider circuits entirely at the bit-level using ordered Binary Decision Diagrams (BDDs), because the BDD representations for t...
Computing cores to be implemented on FPGAs may involve divisions by small integer constants in fixed or floating point. This article presents a family of architectures addressing...
Abstract. This article describes a novel approach to the implementation on an electronic substrate of a process analogous to the cellular division of biological organisms. Cellular...
The paper1 presents and compares various unicast nonblocking architectures to be used into space-domain photonic switching networks. All the analyzed architectures have been evalu...
Luigi Savastano, Guido Maier, Mario Martinelli, Ac...