Sciweavers

38 search results - page 6 / 8
» STMBench7: a benchmark for software transactional memory
Sort
View
MICRO
2010
IEEE
172views Hardware» more  MICRO 2010»
13 years 3 months ago
Architectural Support for Fair Reader-Writer Locking
Abstract--Many shared-memory parallel systems use lockbased synchronization mechanisms to provide mutual exclusion or reader-writer access to memory locations. Software locks are i...
Enrique Vallejo, Ramón Beivide, Adriá...
WOSP
2010
ACM
14 years 18 days ago
Analytical modeling of lock-based concurrency control with arbitrary transaction data access patterns
Nowadays the 2-Phase-Locking (2PL) concurrency control algorithm still plays a core rule in the construction of transactional systems (e.g. database systems and transactional memo...
Pierangelo di Sanzo, Roberto Palmieri, Bruno Cicia...
PODC
2005
ACM
13 years 11 months ago
Toward a theory of transactional contention managers
In recent software transactional memory proposals, a contention manager module is responsible for ensuring that the system as a whole makes progress. A number of contention manage...
Rachid Guerraoui, Maurice Herlihy, Bastian Pochon
POPL
2009
ACM
14 years 6 months ago
Feedback-directed barrier optimization in a strongly isolated STM
Speed improvements in today's processors have largely been delivered in the form of multiple cores, increasing the importance of ions that ease parallel programming. Software...
Nathan Grasso Bronson, Christos Kozyrakis, Kunle O...
PPOPP
2012
ACM
12 years 1 months ago
A speculation-friendly binary search tree
We introduce the first binary search tree algorithm designed for speculative executions. Prior to this work, tree structures were mainly designed for their pessimistic (non-specu...
Tyler Crain, Vincent Gramoli, Michel Raynal