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PVM
1997
Springer
13 years 10 months ago
Embedding SCI into PVM
The extremely low latencies and high bandwidth results achievable with the Scalable Coherent Interface SCI at lowest level encourages its integration into existing Message Passin...
Markus Fischer, Jens Simon
MICRO
2003
IEEE
116views Hardware» more  MICRO 2003»
13 years 11 months ago
Universal Mechanisms for Data-Parallel Architectures
Data-parallel programs are both growing in importance and increasing in diversity, resulting in specialized processors targeted at specific classes of these programs. This paper ...
Karthikeyan Sankaralingam, Stephen W. Keckler, Wil...
SIGCOMM
2009
ACM
14 years 8 days ago
PLUG: flexible lookup modules for rapid deployment of new protocols in high-speed routers
New protocols for the data link and network layer are being proposed to address limitations of current protocols in terms of scalability, security, and manageability. High-speed r...
Lorenzo De Carli, Yi Pan, Amit Kumar, Cristian Est...
VEE
2005
ACM
218views Virtualization» more  VEE 2005»
13 years 11 months ago
The pauseless GC algorithm
Modern transactional response-time sensitive applications have run into practical limits on the size of garbage collected heaps. The heap can only grow until GC pauses exceed the ...
Cliff Click, Gil Tene, Michael Wolf
IEEEPACT
2008
IEEE
14 years 5 days ago
Leveraging on-chip networks for data cache migration in chip multiprocessors
Recently, chip multiprocessors (CMPs) have arisen as the de facto design for modern high-performance processors, with increasing core counts. An important property of CMPs is that...
Noel Eisley, Li-Shiuan Peh, Li Shang