Sciweavers

12 search results - page 2 / 3
» Scalable Network Based FPGA Accelerators for an Automatic Ta...
Sort
View
FCCM
2006
IEEE
133views VLSI» more  FCCM 2006»
14 years 1 days ago
A Scalable FPGA-based Multiprocessor
It has been shown that a small number of FPGAs can significantly accelerate certain computing tasks by up to two or three orders of magnitude. However, particularly intensive lar...
Arun Patel, Christopher A. Madill, Manuel Salda&nt...
ERSA
2006
161views Hardware» more  ERSA 2006»
13 years 7 months ago
A Parametric Study of Scalable Interconnects on FPGAs
Abstract-- With the constantly increasing gate capacity of FPGAs, a single FPGA chip is able to employ large-scale applications. To connect a large number of computational nodes, N...
Daihan Wang, Hiroki Matsutani, Masato Yoshimi, Mic...
FCCM
2011
IEEE
220views VLSI» more  FCCM 2011»
12 years 9 months ago
Reducing the Energy Cost of Irregular Code Bases in Soft Processor Systems
— This paper describes an architecture and FPGA synthesis toolchain for building specialized, energy-saving coprocessors called Irregular Code Energy Reducers (ICERs) for a wide ...
Manish Arora, Jack Sampson, Nathan Goulding-Hotta,...
WWW
2002
ACM
14 years 6 months ago
Accelerated focused crawling through online relevance feedback
The organization of HTML into a tag tree structure, which is rendered by browsers as roughly rectangular regions with embedded text and HREF links, greatly helps surfers locate an...
Soumen Chakrabarti, Kunal Punera, Mallela Subraman...
CASES
2009
ACM
14 years 15 days ago
CGRA express: accelerating execution using dynamic operation fusion
Coarse-grained reconfigurable architectures (CGRAs) present an appealing hardware platform by providing programmability with the potential for high computation throughput, scalab...
Yongjun Park, Hyunchul Park, Scott A. Mahlke