7 search results - page 2 / 2 » Scalable and scalably-verifiable sequential synthesis |
PLDI
2012
ACM
11 years 7 months ago
2012
ACM
Modern architectures implement relaxed memory models which may reorder memory operations or execute them non-atomically. Special instructions called memory fences are provided, al...
DATE
2009
IEEE
14 years 4 hour ago
2009
IEEE
—Accurate timing analysis is crucial for obtaining the optimal clock frequency, and for other design stages such as power analysis. Most methods for estimating propagation delay ...