17 search results - page 4 / 4 » Scheduling Reusable Instructions for Power Reduction |
GLVLSI
2010
IEEE
13 years 10 months ago
2010
IEEE
NBTI is one of the most important silicon reliability problems facing processor designers today. The impact of NBTI can be mitigated at both the circuit and microarchitecture leve...
HPCA
2007
IEEE
14 years 5 months ago
2007
IEEE
3D integration technology greatly increases transistor density while providing faster on-chip communication. 3D implementations of processors can simultaneously provide both laten...