40 search results - page 1 / 8 » Scheduling and Module Assignment for Reducing Bist Resources |
DATE
1998
IEEE
13 years 9 months ago
1998
IEEE
Built-in self-test BIST techniques modify functional hardware to give a data path the capability to test itself. The modi cation of data path registers into registers BIST resourc...
DATE
1999
IEEE
13 years 9 months ago
1999
IEEE
In this paper, new and efficient BIST methodology and BIST hardware insertion algorithms are presented for RTL data paths obtained from high level synthesis. The methodology is ba...
ASPDAC
2005
ACM
13 years 10 months ago
2005
ACM
– Reducing power consumption through high-level synthesis has attracted a growing interest from researchers due to its large potential for power reduction. In this work we study ...
CGO
2003
IEEE
13 years 10 months ago
2003
IEEE
Predicated execution enables the removal of branches wherein segments of branching code are converted into straight-line segments of conditional operations. An important, but gene...
AIPS
2000
13 years 6 months ago
2000
In this paper, we describe the Barrel Allocator, a scheduling tool developed for day-to-day allocation and management of airlift and tanker resources at the USAF Air Mobility Comm...