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EUROPAR
2000
Springer
13 years 8 months ago
Scheduling the Computations of a Loop Nest with Respect to a Given Mapping
Abstract. When parallelizing loop nests for distributed memory parallel computers, we have to specify when the different computations are carried out (computation scheduling), wher...
Alain Darte, Claude G. Diderich, Marc Gengler, Fr&...
CGO
2004
IEEE
13 years 9 months ago
Single-Dimension Software Pipelining for Multi-Dimensional Loops
Traditionally, software pipelining is applied either to the innermost loop of a given loop nest or from the innermost loop to outer loops. In this paper, we propose a threestep ap...
Hongbo Rong, Zhizhong Tang, Ramaswamy Govindarajan...
NCA
2005
IEEE
13 years 10 months ago
Reducing the Communication Cost via Chain Pattern Scheduling
This paper deals with general nested loops and proposes a novel scheduling methodology for reducing the communication cost of parallel programs. General loops contain complex loop...
Florina M. Ciorba, Theodore Andronikos, Ioannis Dr...
ICCAD
2009
IEEE
179views Hardware» more  ICCAD 2009»
13 years 3 months ago
Automatic memory partitioning and scheduling for throughput and power optimization
Hardware acceleration is crucial in modern embedded system design to meet the explosive demands on performance and cost. Selected computation kernels for acceleration are usually ...
Jason Cong, Wei Jiang, Bin Liu, Yi Zou
ASAP
2005
IEEE
87views Hardware» more  ASAP 2005»
13 years 11 months ago
Expression Synthesis in Process Networks generated by LAURA
The COMPAAN/LAURA [18] tool chain maps nested loop applications written in Matlab onto reconfigurable platforms, such as FPGAs. COMPAAN rewrites the original Matlab application a...
Claudiu Zissulescu, Bart Kienhuis, Ed F. Depretter...