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CSREAESA
2003
13 years 6 months ago
Low-Power Dynamic Scheduling in Heterogeneous Systems
: This paper develops a matching and scheduling algorithm that accounts for both the execution time and the power consumption of the application. The power consumption of different...
Saumya Uppaluri, Baback A. Izadi, Damu Radhakrishn...
DATE
2010
IEEE
163views Hardware» more  DATE 2010»
13 years 9 months ago
Enhanced Q-learning algorithm for dynamic power management with performance constraint
- This paper presents a novel power management techniques based on enhanced Q-learning algorithms. By exploiting the submodularity and monotonic structure in the cost function of a...
Wei Liu, Ying Tan, Qinru Qiu
CODES
2003
IEEE
13 years 10 months ago
A low power scheduler using game theory
In this paper, we describe a new methodology based on game theory for minimizing the average power of a circuit during scheduling in behavioral synthesis. The problem of schedulin...
N. Ranganathan, Ashok K. Murugavel
GLVLSI
2003
IEEE
119views VLSI» more  GLVLSI 2003»
13 years 10 months ago
Simultaneous peak and average power minimization during datapath scheduling for DSP processors
The use of multiple supply voltages for energy and average power reduction is well researched and several works have appeared in the literature. However, in low power design using...
Saraju P. Mohanty, N. Ranganathan, Sunil K. Chappi...
ISLPED
2004
ACM
159views Hardware» more  ISLPED 2004»
13 years 10 months ago
Dynamic voltage scaling for systemwide energy minimization in real-time embedded systems
Traditionally, dynamic voltage scaling (DVS) techniques have focused on minimizing the processorenergy consumption as opposed to the entire system energy consumption. The slowdown...
Ravindra Jejurikar, Rajesh K. Gupta