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» Secure AES Hardware Module for Resource Constrained Devices
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IPPS
2005
IEEE
13 years 10 months ago
IPSec Implementation on Xilinx Virtex-II Pro FPGA and Its Application
In this paper, we propose an IPSec implementation on Xilinx Virtex-II Pro FPGA1 . We move the key management and negotiation into software function calls that run on the PowerPC p...
Jing Lu, John W. Lockwood
FPL
2008
Springer
105views Hardware» more  FPL 2008»
13 years 6 months ago
Bitstream encryption and authentication with AES-GCM in dynamically reconfigurable systems
A high-speed and secure dynamic partial reconfiguration (DPR) system is realized with AES-GCM that guarantees both confidentiality and authenticity of FPGA bitstreams. In DPR syst...
Yohei Hori, Akashi Satoh, Hirofumi Sakane, Kenji T...
FPL
2010
Springer
129views Hardware» more  FPL 2010»
13 years 2 months ago
FPGA Implementations of the Round Two SHA-3 Candidates
Abstract--The second round of the NIST-run public competition is underway to find a new hash algorithm(s) for inclusion in the NIST Secure Hash Standard (SHA-3). This paper present...
Brian Baldwin, Andrew Byrne, Liang Lu, Mark Hamilt...
CRYPTO
2011
Springer
222views Cryptology» more  CRYPTO 2011»
12 years 4 months ago
The PHOTON Family of Lightweight Hash Functions
RFID security is currently one of the major challenges cryptography has to face, often solved by protocols assuming that an on-tag hash function is available. In this article we pr...
Jian Guo 0001, Thomas Peyrin, Axel Poschmann
INFOCOM
2006
IEEE
13 years 10 months ago
Leveraging Channel Diversity for Key Establishment in Wireless Sensor Networks
— As the use of sensor networks increases, security in this domain becomes a very real concern. One fundamental aspect of providing confidentiality and authentication is key dis...
Matthew J. Miller, Nitin H. Vaidya