Sciweavers

4 search results - page 1 / 1
» Self-Monitored Adaptive Cache Warm-Up for Microprocessor Sim...
Sort
View
SBACPAD
2004
IEEE
75views Hardware» more  SBACPAD 2004»
13 years 6 months ago
Self-Monitored Adaptive Cache Warm-Up for Microprocessor Simulation
Yue Luo, Lizy Kurian John, Lieven Eeckhout
ISPASS
2003
IEEE
13 years 10 months ago
Memory reference reuse latency: Accelerated warmup for sampled microarchitecture simulation
Abstract— This paper proposes to speedup sampled microprocessor simulations by reducing warmup times without sacrificing simulation accuracy. It exploiting the observation that ...
John W. Haskins Jr., Kevin Skadron
CSREAESA
2003
13 years 6 months ago
Static Pattern Predictor (SPP) Based Low Power Instruction Cache Design
Energy dissipation in cache memories is becoming a major design issue in embedded microprocessors. Predictive filter cache based instruction cache hierarchy is effective in reduci...
Kugan Vivekanandarajah, Thambipillai Srikanthan, C...
GLOBECOM
2008
IEEE
13 years 5 months ago
On the Impact of Caching for High Performance Packet Classifiers
Hash functions have a space complexity of O(n) and a possible time complexity of O(1). Thus, packet classifiers exploit hashing to achieve packet classification in wire speed. Esp...
Harald Widiger, Andreas Tockhorn, Dirk Timmermann